Half-bridge and full-bridge power stages are commonly employed as power delivery stages in applications where power conversion at high efficiencies is required. For example, half-bridge and full-bridge power stages can be employed in DC-DC power converters and class-D audio power amplifiers. In portable power integrated circuits (ICs), power conversion and power delivery to the load is required at exceptionally high efficiencies. As an example, limited battery power typically needs to be delivered to the load at minimal losses to prolong battery life.
In portable electronics applications, power management, audio, and digital circuitry can be integrated on one system-on-chip (SoC) die to create products with a small form factor. However, the integration of power applications on digital complementary metal-oxide semiconductor (CMOS) technologies presents numerous challenges. Digital CMOS process technologies are primarily optimized for switching speed along with maximizing the logic-gate count realizable within a given area.
As an example, a given transistor in such digital CMOS processes can have a feature size that can vary from 45 nm to 0.18 μm. A maximum gate-source breakdown voltage of the given transistor can thus vary from 1.0 volts to 1.8 volts. However, a battery voltage in portable devices can typically range from 2.3 volts to 5.5 volts, which is a voltage that is significantly larger than that which can be tolerated on the typical CMOS transistor devices. Thus, level-shifting circuitry can be implemented to control high and/or low-side power transistors in a half-bridge or full-bridge circuit, regardless of the maximum battery voltage and variations of the voltage of a given battery.